Do you want to set your role as Web Master or something relevant?

Hi,

Thanks for joining the CHIMES community web site. We are busy adding some initial content and starting to lay out how the IKC will develop. I have started to add some points under the Design Commons including a discussion on how we will support both open-source IP and toolchains and also licensed IP and commercial Electronic Design Automation work flows.

Do you have a preference for your EDA work flow environment? 

John.

Hi,

Kings are a member of Europractice and so should have access to most of the commercial EDA tools. Making sure you have access to the necessary EDA tooling is a key part of setting up any design project. 

John.

Hi John,

Thanks for joining the CHIMES community web site. We are busy adding some initial content and starting to lay out how the IKC will develop. I have started to add some points under the Core Design including a 'pathway to manufacture' for you. Ibrahim will be in touch to talk about Projects. We are all looking forward to working with you within the IKC.

I am trying to get a view from people about how they are fixed for design tool support. There is an evolving discussion about 'Package Assembly Design Kit (PADK) as opposed to the traditional Process Design Kit (PDK) files used within the semiconductor industry to model the foundry fabrication process in the EDA design tools. We are planning some road mapping and development in this area. Perhaps something to discuss?  

John.

Laura,

We are starting to add some initial content to the CHIMES site and hopefully starting to lay out to people how the IKC will develop. If you have a look around you will see the four major areas each have a section now and we are trying to add examples to each as a starter. If you have any views / comments on the site please do respond and then we can move things along.

John.

Hi,

Thanks for signing up. It will be good to move ahead next with working up your Research area.

John.

Michael,

Welcome to the IKC in HI. Sorry for the delay in welcoming you. It was a busy week last week ay Microelectronics UK event. It was good to meet many of the UK electronic systems community both familiar faces and new connections. Although the new IKC was announced in the summer announcement of the Industrial Strategy we are still in the forming stages. Hopefully between now and the end of the year we will be able to establish the direction for the IKC and the UK community in this important area.

We look forward to finding ways to collaborate with you.

John.

An interesting paper on 'Energy Efficiency of Low Swing Signaling for Emerging Interposer Technologies'  from the University of Manchester. Energy efficiency of interposer-based interconnects depends highly on the total capacitance of the driven load as well as the interconnect length.  When electrostatic discharge (ESD) protection is required, low swing signaling is superior in energy consumption due to the high capacitive load of the ESD circuit. The energy efficiency of low swing signaling increases in the case where large wire width in combination with low spacing are required.

Ayar Labs have announced a Universal Chiplet Interconnect Express™ (UCIe™) based 8 Tbps bandwidth optical interconnect chiplet. The TeraPHY™ optical I/O chiplet combines silicon photonics with CMOS manufactured parts within a multi-chip package. Ayar Labs believe compatibility with the UCIe standard will allow their optical interconnect technology to be interoperable with chiplets from different vendors and ease the design and integration work for their customer's designs.

If you prefer to watch a video of the Ayar Labs offering then see here.